Semiconductor integrated device and method of fabrication thereof
US6969671B2 · kind B2 · utility
5Cited by
6References
30Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 4, 1997 |
| Grant date | Nov 29, 2005 |
| Priority date | — |
| Expiry date | Nov 4, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A diffusion layer 3a of a silicon substrate, a polycrystalline silicon material 10, or a gate electrode 12 is connected to a conductive film 8 through a titanium silicide film 6 within a contact hole 5 provided in an insulating film 4. The titanium silicide film 6 is formed by the silicide reaction between a titanium film 7 and the silicon. The upper limit of the thickness of the titanium silicide film 6, and the upper limit of the titanium film 7 are specified by the internal stress within the conductive film 8.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.