Accuracy of timing analysis using region-based voltage drop budgets
US6971079B2 · kind B2 · utility
3Cited by
11References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 18, 2002 |
| Grant date | Nov 29, 2005 |
| Priority date | — |
| Expiry date | Apr 9, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/3312
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for improving the timing accuracy of an integrated circuit through region-based voltage drop budgets is provided. Further, a method for performing timing analysis on an integrated circuit partitioned into voltage drop regions is provided. During the timing analysis, a set of logic paths segments in each voltage drop region is tested to ensure that the integrated circuit meets a set of predefined timing requirements. Logic path segments that reside in different voltage drop regions are tested using a supply voltage inputted by the respective voltage drop region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.