Gin Yee
28Patents
12h-index
37Co-inventors
81Inventor score
Filing activity: Jan 19, 2000 → Jun 19, 2020
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6510545B1 | Automated shielding algorithm for dynamic circuits | Electricity | 79 | Expired |
| US6720813B1 | Dual edge-triggered flip-flop design with asynchronous programmable reset | Electricity | 28 | Expired |
| US6812758B2 | Negative bias temperature instability correction technique for delay locked loop and phase locked loop bias generators | Electricity | 26 | Expired |
| US6686785B2 | Deskewing global clock skew using localized DLLs | Electricity | 25 | Expired |
| US7129800B2 | Compensation technique to mitigate aging effects in integrated circuit components | Physics | 25 | Expired |
| US6265923A | Dual rail dynamic flip-flop with single evaluation path | Electricity | 19 | Expired |
| US6549038B1 | Method of high-performance CMOS design | Electricity | 18 | Expired |
| US6934652B2 | On-chip temperature measurement technique | Physics | 18 | Expired |
| US6882196B2 | Duty cycle corrector | Electricity | 17 | Expired |
| US9838025B1 | Method for reducing lock time in a closed loop clock signal generator | Electricity | 15 | Active |
| US6814485B2 | On-die thermal monitoring technique | Physics | 12 | Expired |
| US6976235B2 | Region-based voltage drop budgets for low-power design | Physics | 12 | Expired |
| US7054787B2 | Embedded integrated circuit aging sensor system | Physics | 12 | Expired |
| US6662126B2 | Measuring skew using on-chip sampling | Physics | 11 | Expired |
| US6707320B2 | Clock detect indicator | Physics | 9 | Expired |
| US7688925B2 | Bit-deskewing IO method and system | Electricity | 6 | Active |
| US6529057B2 | Stretching, shortening, and/or removing a clock cycle | Electricity | 6 | Expired |
| US6815991B2 | Clock frequency multiplier | Electricity | 4 | Expired |
| US7663398B1 | Circuit and method for high impedance input/output termination in shut off mode and for negative signal swing | Electricity | 3 | Active |
| US6441656B1 | Clock divider for analysis of all clock edges | Electricity | 3 | Expired |
| US10521391B1 | Chip to chip interface with scalable bandwidth | Physics | 3 | Active |
| US6812755B2 | Variation reduction technique for charge pump transistor aging | Electricity | 3 | Expired |
| US6971079B2 | Accuracy of timing analysis using region-based voltage drop budgets | Physics | 3 | Expired |
| US6642756B1 | Frequency multiplier design | Electricity | 2 | Expired |
| US11023403B2 | Chip to chip interface with scalable bandwidth | Physics | 1 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.