Flash memory structure and manufacturing method thereof

US6972455B2 · kind B2 · utility

Assignee

• UNITED MICROELECTRONICS CORP. · TW

Inventor

• Han Liu · Waltham, US

Key dates

• Filing date: Dec 22, 2003
• Grant date: Dec 6, 2005
• Expiry date: Dec 22, 2023

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/6891

Abstract

A flash memory structure having high coupling ratio and the manufacturing method thereof are provided. The manufacturing method includes the following steps of method of a flash memory having high coupling ratio, including steps of providing a substrate, forming a first isolation structure and a second isolation structure upon the substrate, forming a gate electrode upon the substrate between the first isolation structure and the second isolation structure, to then further cover parts of the first isolation structure and the second isolation structure, removing parts of the first isolation structure and the second isolation structure uncovered by the gate electrode for a specific range, forming a first silicon layer upon the gate electrode, the first isolation structure and the second isolation structure, removing parts of the first silicon layer to expose the gate electrode and parts of the first isolation structure and the second isolation structure for forming a flash memory floating gate structure having sidewalls, forming a dielectric layer upon the floating gate structure, and forming a second silicon layer upon the dielectric layer.