Microprocessor including return prediction unit configured to determine whether a stored return address corresponds to more than one call instruction
US6973563B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 4, 2002 |
| Grant date | Dec 6, 2005 |
| Priority date | — |
| Expiry date | Sep 14, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3844
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Various embodiments of methods and systems for implementing a return address prediction mechanism in a microprocessor are disclosed. In one embodiment, a return address prediction mechanism includes a return storage and a controller. The return storage includes one or more entries. One of the entries includes a count and a first return address that corresponds to a recently detected call operation. The controller is configured to receive a new return address that corresponds to a call instruction and to compare the new return address to the return address stored in the entry. If the new return address equals the return address in the entry, the controller may be configured to increase the value of the count in the entry. By increasing the count instead of allocating a new entry in the return storage to the new return address, the effective size of the return storage may be increased.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.