Method and apparatus for making an imprinted conductive circuit using semi-additive plating
US6974775B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 31, 2002 |
| Grant date | Dec 13, 2005 |
| Priority date | — |
| Expiry date | Dec 31, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/4846
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for making an imprinted conductive circuit using semi-additive plating. A plurality of indented channels is formed on the substrate. The surface is coated with a conductive layer. Portions of the surface other than the indented channels are coated with a non-conductive layer, and metal is plated on the conductive layer in the channels. The non-conductive layer and the first conductive layer are removed from portions of the surface other than the indented channels. In some embodiments, a first set of channels has a first depth and a second set of channels has a second depth. The plating adds a first amount of metal in the first set of channels and the second set of channels. The first set of channels is coated with a non-conductive layer, and a second amount of additional conductive material is plated in the second set of channels.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.