Semiconductor device including a gate insulating film on a recess and source and drain extension regions
US6977415B2 · kind B2 · utility
48Cited by
5References
7Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 12, 2003 |
| Grant date | Dec 20, 2005 |
| Priority date | — |
| Expiry date | Sep 12, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/017
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device comprising a semiconductor substrate having a recess whose depth is not more than 6 nm, a source region and a drain region which are formed in a surface region of the semiconductor substrate so as to sandwich the recess, each of the source region and the drain region being constituted of an extension region and a contact junction region, a gate insulating film formed between the source region and the drain region in the semiconductor substrate, and a gate electrode formed on the gate insulating film.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.