Patent · US Expired

Method for fabricating a self-aligned bipolar transistor having increased manufacturability and related structure

US6979626B2 · kind B2 · utility

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3References
3Claims
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Inventors

Key dates

Filing dateMay 21, 2003
Grant dateDec 27, 2005
Priority date
Expiry dateAug 25, 2023

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D62/133

Abstract

According to one exemplary embodiment, a bipolar transistor comprises a base having a top surface. The bipolar transistor further comprises a base oxide layer situated on top surface of the base. The bipolar transistor further comprises a sacrificial post situated on the base oxide layer. The bipolar transistor further comprises a conformal layer situated over the sacrificial post and top surface of the base, where the conformal layer has a density greater than a density of the base oxide layer. The conformal layer may be, for example, HDPCVD oxide. According to this exemplary embodiment, the bipolar transistor further comprises a sacrificial planarizing layer situated over the conformal layer. The sacrificial planarizing layer has a first thickness in a first region between first and second link spacers and a second thickness in a second region outside of first and second link spacers, where the second thickness is generally greater than the first thickness.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.