Trim zener using double poly process
US6979879B1 · kind B1 · utility
5Cited by
13References
18Claims
0Family size
Assignee
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Key dates
| Filing date | Apr 30, 2004 |
| Grant date | Dec 27, 2005 |
| Priority date | — |
| Expiry date | Apr 30, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D8/25
Abstract
In a zener zap diode device and a system for making such a device using a double poly process, p+ and n+regions are formed in a tub by means of p-doped and n-doped polysilicon regions, and a p-n junction is formed between the p+ region and an n-tub or between the n+ region and a p-tub. Cobalt or other refractory metal is reacted with silicon to form a silicide on at least the p-doped polysilicon region. By reverse biasing the p-n junction and establishing a sufficiently high zap current, the silicide can be forced to migrate across the junction to form a silicide bridge thereby selectively shorting out the p-n junction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.