System and method to reduce leakage power in an electronic device
US6981231B2 · kind B2 · utility
3Cited by
13References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 22, 2002 |
| Grant date | Dec 27, 2005 |
| Priority date | — |
| Expiry date | Aug 22, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/327
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method to reduce leakage power consumption of electronic devices. In addition to assigning threshold voltages, sizes of the transistors within the device may be varied to provide a range of options to meet the timing requirements while minimizing the leakage power consumption.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.