Weize Xie
8Patents
5h-index
10Co-inventors
49Inventor score
Filing activity: Mar 24, 2000 → Jul 30, 2002
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6981230B1 | On-chip power-ground inductance modeling using effective self-loop-inductance | Physics | 18 | Expired |
| US6449754B1 | Method of measuring the accuracy of parasitic capacitance extraction | Physics | 14 | Expired |
| US6621305B2 | Partial swing low power CMOS logic circuits | Electricity | 10 | Expired |
| US6566924B2 | Parallel push algorithm detecting constraints to minimize clock skew | Physics | 8 | Expired |
| US6567960B2 | System for improving circuit simulations by utilizing a simplified circuit model based on effective capacitance and inductance values | Physics | 5 | Expired |
| US6925555B2 | System and method for determining a plurality of clock delay values using an optimization algorithm | Physics | 5 | Expired |
| US6981231B2 | System and method to reduce leakage power in an electronic device | Physics | 3 | Expired |
| US6661281B2 | Method for reducing current surge using multi-stage ramp shunting | Electricity | 2 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.