Methods and apparatus for cache intervention

US6983348B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Sujat Jamil · Gilbert, US
• Hang T. Nguyen · Tempe, US
• Samantha J. Edirisooriya · Tempe, US
• David E. Miner · Chandler, US
• R. Frank O'Bleness · Tempe, US
• Steven Tu · Phoenix, US

Key dates

• Filing date: Nov 25, 2002
• Grant date: Jan 3, 2006
• Expiry date: Nov 25, 2022

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y02D10/00
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

Methods and Apparatus for cache-to-cache transfers upon snooping a cache interconnect to detect a memory read request associated with a cache memory block cached in a first cache and a second cache. Upon a cache hit to a first and a second cache, supplying the cached memory block from the first cache or the second cache to a third cache based on a predetermined arbitration hierarchy.