Epitaxial growth for waveguide tapering
US6987912B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 23, 2004 |
| Grant date | Jan 17, 2006 |
| Priority date | — |
| Expiry date | May 1, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02B6/131
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A method to form a semiconductor taper without etching the taper surfaces. In one embodiment, a semiconductor waveguide is formed on a workpiece having an unetched top surface; e.g., using a silicon insulator (SOI) wafer. A protective layer is formed on the waveguide. The protective layer is patterned and etched to form a mask that exposes a portion of the waveguide in the shape of the taper's footprint. In one embodiment, selective silicon epitaxy is used to grow the taper on the exposed portion of the waveguide so that the taper is formed without etched surfaces. Micro-loading effects can cause the upper surface of the taper to slope toward the termination end of the taper.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.