Method of forming FinFET gates without long etches

US6989308B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Toshiharu Furukawa · South Burlington, US
• Mark C. Hakey · Saint Albans, US
• Steven J. Holmes · Colchester, US
• David Vaclav Hofak · South Burlington, US
• Charles W. Koburger, III · Delmar, US
• Peter H. Mitchell · Jericho, US
• Larry Nesbit · Farmington, US

Key dates

• Filing date: Mar 11, 2004
• Grant date: Jan 24, 2006
• Expiry date: May 5, 2024

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/611

Abstract

A method for forming a gate for a FinFET uses a series of selectively deposited sidewalls along with other sacrificial layers to create a cavity in which a gate can be accurately and reliably formed. This technique avoids long directional etching steps to form critical dimensions of the gate that have contributed to the difficulty of forming FinFETs using conventional techniques. In particular, a sacrificial seed layer, from which sidewalls can be accurately grown, is first deposited over a silicon fin. Once the sacrificial seed layer is etched away, the sidewalls can be surrounded by another disposable layer. Etching away the sidewalls will result in cavities being formed that straddle the fin, and gate conductor material can then be deposited within these cavities. Thus, the height and thickness of the resulting FinFET gate can be accurately controlled by avoiding a long direction etch down the entire height of the fin.