Inventor · Farmington, CT, US

Larry Nesbit

41Patents
14h-index
32Co-inventors
81Inventor score

Filing activity: Sep 21, 1981 → Feb 14, 2008

Most-cited inventions

PatentTitleAreaCited byStatus
US6713835B1 Method for manufacturing a multi-level interconnect structure Electricity 246 Expired
US6429068B1 Structure and method of fabricating embedded vertical DRAM arrays with silicided bitline and polysilicon interconnect Electricity 38 Expired
US6573137B1 Single sided buried strap Electricity 31 Expired
US7374793B2 Methods and structures for promoting stable synthesis of carbon nanotubes Emerging Cross-Sectional Technologies 28 Active
US7585614B2 Sub-lithographic imaging techniques and processes Electricity 24 Active
US6184107A Capacitor trench-top dielectric for self-aligned device isolation Electricity 24 Expired
US6509624B1 Semiconductor fuses and antifuses in vertical DRAMS Electricity 23 Expired
US7038299B2 Selective synthesis of semiconducting carbon nanotubes Emerging Cross-Sectional Technologies 23 Expired
US6084276A Threshold voltage tailoring of corner of MOSFET device Electricity 22 Expired
US4398341A Method of fabricating a highly conductive structure Emerging Cross-Sectional Technologies 20 Expired
US7691720B2 Vertical nanotube semiconductor device structures and methods of forming the same Emerging Cross-Sectional Technologies 17 Active
US6727539B2 Embedded vertical DRAM arrays with silicided bitline and polysilicon interconnect Electricity 17 Expired
US6309924A Method of forming self-limiting polysilicon LOCOS for DRAM cell Electricity 15 Expired
US6541810B2 Modified vertical MOSFET and methods of formation thereof Electricity 15 Expired
US6890828B2 Method for supporting a bond pad in a multilevel interconnect structure and support structure formed thereby Electricity 14 Expired
US6989308B2 Method of forming FinFET gates without long etches Electricity 12 Expired
US5994202A Threshold voltage tailoring of the corner of a MOSFET device Electricity 11 Expired
US5923991A Methods to prevent divot formation in shallow trench isolation areas Electricity 10 Expired
US7211844B2 Vertical field effect transistors incorporating semiconducting nanotubes grown in a spacer-defined passage Emerging Cross-Sectional Technologies 10 Expired
US6620676B2 Structure and methods for process integration in vertical DRAM cell fabrication Electricity 7 Expired
US7273794B2 Shallow trench isolation fill by liquid phase deposition of SiO2 Electricity 7 Expired
US7829883B2 Vertical carbon nanotube field effect transistors and arrays Emerging Cross-Sectional Technologies 6 Expired
US6998204B2 Alternating phase mask built by additive film deposition Physics 6 Expired
US7250347B2 Double-gate FETs (Field Effect Transistors) Electricity 6 Expired
US6790739B2 Structure and methods for process integration in vertical DRAM cell fabrication Electricity 5 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.