Patent · US Expired

Circuit for generating clock pulses in a communications system

US6990159B1 · kind B1 · utility

4Cited by

3References

7Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Markus Balb · Munich, DE
Ralf Schedel · Rödental, DE
Walter Fiessinger · Taufkirchen, DE

Key dates

Filing date	May 29, 2000
Grant date	Jan 24, 2006
Priority date	—
Expiry date	Jan 6, 2021

Classification

Technology area (CPC H)Electricity
CPC primaryH04Q2213/1336
WIPO fieldTelecommunications
WIPO sectorElectrical engineering

Abstract

A circuit arrangement for a communication system for terminating a plurality of interfaces at a common bus and for generating a synchronization clock for synchronizing the bus is provided. In one aspect, a circuit arrangement for a communication system includes a first multiplexer controlled by a first control signal with a plurality of inputs corresponding to a plurality of transmission lines of the interfaces, a respective phase control unit, preceding each input of the first multiplexer, which derives a respective clock generator signal from a received signal of the corresponding transmission line, where the clock generator signal of one of the transmission lines is switched through as output signal of the first multiplexer in dependence on the first control signal, and a phase locked loop, at the inputs of which the output signal of the first multiplexer and a clock from a clock generator operated with an external crystal oscillator.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.