Ultra-thin, high quality strained silicon-on-insulator formed by elastic strain transfer
US6991998B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 2, 2004 |
| Grant date | Jan 31, 2006 |
| Priority date | — |
| Expiry date | Jul 2, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02694
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a semiconductor structure comprising a first strained semiconductor layer over an insulating layer is provided in which the first strained semiconductor layer is relatively thin (less than about 500 Å) and has a low defect density (stacking faults and threading defects). The method of the present invention begins with forming a stress-providing layer, such a SiGe alloy layer over a structure comprising a first semiconductor layer that is located atop an insulating layer. The stress-providing layer and the first semiconductor layer are then patterned into at least one island and thereafter the structure containing the at least one island is heated to a temperature that causes strain transfer from the stress-providing layer to the first semiconductor layer. After strain transfer, the stress-providing layer is removed from the structure to form a first strained semiconductor island layer directly atop said insulating layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.