Integrated micro channels and manifold/plenum using separate silicon or low-cost polycrystalline silicon
US6992382B2 · kind B2 · utility
64Cited by
11References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 29, 2003 |
| Grant date | Jan 31, 2006 |
| Priority date | — |
| Expiry date | Dec 29, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for cooling an electronics chip with a cooling plate having integrated micro channels and manifold/plenum made in separate single-crystal silicon or low-cost polycrystalline silicon. Forming the microchannels in the cooling plate is more economical than forming the microchannels directly into the back of the chip being cooled. In some embodiments, the microchannels are high-aspect-ratio grooves formed (e.g., by etching) into a polycrystalline silicon cooling base, which is then attached to a cover (to contain the cooling fluid in the grooves) and to the back of the chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.