Formation of micro rough polysurface for low sheet resistant salicided sub-quarter micron polylines
US6992388B2 · kind B2 · utility
3Cited by
24References
15Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 6, 2002 |
| Grant date | Jan 31, 2006 |
| Priority date | — |
| Expiry date | Jul 7, 2023 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/964
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
This invention relates to a method for manufacturing a semiconductor device having polysilicon lines with micro-roughness on the surface. The micro-rough surface of the polysilicon lines help produce smaller grain size silicide film during the formation phase to reduce the sheet resistance. The micro-rough surface of the polysilicon lines also increases the effective surface area of the silicide contacting polysilicon lines thereby reduces the overall resistance of the final gate structure after metallization.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.