Nonvolatile memory cell
US6992927B1 · kind B1 · utility
23Cited by
6References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 8, 2004 |
| Grant date | Jan 31, 2006 |
| Priority date | — |
| Expiry date | Jul 30, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2216/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated nonvolatile memory circuit having a plurality of control devices. Separate devices execute distinct control, erase, write and read operations, thereby allowing each device to be individually selected and optimized for performing its respective operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.