Hengyang (James) Lin
18Patents
8h-index
13Co-inventors
65Inventor score
Filing activity: Dec 3, 1998 → Jan 21, 2011
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6169310A | Electrostatic discharge protection device | Electricity | 26 | Expired |
| US6992927B1 | Nonvolatile memory cell | Physics | 23 | Expired |
| US6184557A | I/O circuit that utilizes a pair of well structures as resistors to delay an ESD event and as diodes for ESD protection | Electricity | 21 | Expired |
| US6563730B1 | Low power static RAM architecture | Physics | 19 | Expired |
| US7167392B1 | Non-volatile memory cell with improved programming technique | Physics | 14 | Expired |
| US7558969B1 | Anti-pirate circuit for protection against commercial integrated circuit pirates | Physics | 13 | Expired |
| US7239558B1 | Method of hot electron injection programming of a non-volatile memory (NVM) cell array in a single cycle | Physics | 13 | Expired |
| US7164606B1 | Reverse fowler-nordheim tunneling programming for non-volatile memory cell | Physics | 9 | Expired |
| US6618282B1 | High density ROM architecture with inversion of programming | Physics | 7 | Expired |
| US8363469B1 | All-NMOS 4-transistor non-volatile memory cell | Electricity | 5 | Active |
| US7286383B1 | Bit line sharing and word line load reduction for low AC power SRAM architecture | Physics | 5 | Expired |
| US6642587B1 | High density ROM architecture | Electricity | 5 | Expired |
| US7126866B1 | Low power ROM architecture | Physics | 4 | Expired |
| US7656698B1 | Non-volatile memory cell with improved programming technique with decoupling pass gates and equalize transistors | Physics | 4 | Active |
| USRE44130E1 | Anti-pirate circuit for protection against commercial integrated circuit pirates | General | 1 | Active |
| US6801046B1 | Method of testing the electrostatic discharge performance of an IC device | Physics | 1 | Expired |
| US7061792B1 | Low AC power SRAM architecture | Physics | 1 | Expired |
| US8213227B2 | 4-transistor non-volatile memory cell with PMOS-NMOS-PMOS-NMOS structure | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.