Method for manufacturing electronic circuits integrated on a semiconductor substrate
US6998348B2 · kind B2 · utility
3Cited by
18References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 1, 2003 |
| Grant date | Feb 14, 2006 |
| Priority date | — |
| Expiry date | May 1, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/0276
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for manufacturing semiconductor-integrated electronic circuits includes: depositing an auxiliary layer on a substrate; depositing a layer of screening material on the auxiliary layer; selectively removing the layer of screening material to provide a first opening in the layer of screening material and expose an area of the auxiliary layer; and removing this area of the auxiliary layer to form a second opening in the auxiliary layer, whose cross-section narrows toward the substrate to expose an area of the substrate being smaller than the area exposed by the first opening.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.