Lateral low-side and high-side high-voltage devices
US6998681B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 28, 2004 |
| Grant date | Feb 14, 2006 |
| Priority date | — |
| Expiry date | Sep 28, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/859
Abstract
Lateral high-side and low-side high-voltage devices with low specific on-resistances are made in a first and in a second surface voltage-sustaining region, respectively. In the on-state of high-side MOST (the right portion of the figure), the voltage across its source and its drain is very low and only layer 5 (p-type) is depleted to a large extent, layer 6 and layer 7 remain neutral and can serve as drift region(s) of electrons and/or holes. The drift region can be used for a single n-MOST or p-MOST, or even a parallel connection of n-MOST and p-MOST as shown in the figure. In the off-state of the high-side MOST, the voltage across its source and its drain is very large, but the voltage across its drain and the substrate 1 can be very low, and all of the layers in the first surface voltage-sustaining region are depleted, the depleted layer 5 produces an optimum variation lateral density of charge.The low-side MOST (the left portion of the figure) is similar to the high-side MOST.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.