In-wafer testing of integrated optical components in photonic integrated circuits (PICs)
US7006719B2 · kind B2 · utility
21Cited by
11References
25Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 10, 2003 |
| Grant date | Feb 28, 2006 |
| Priority date | — |
| Expiry date | Jul 14, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01S5/4087
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
Disclosed are apparatus and methods of reducing insertion loss, passivation, planarization and in-wafer testing of integrated optical components and in-wafer chips in photonic integrated circuits (PICs).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.