Method of forming a wafer backside interconnecting wire
US7008821B1 · kind B1 · utility
12Cited by
1References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 19, 2004 |
| Grant date | Mar 7, 2006 |
| Priority date | — |
| Expiry date | Nov 19, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a wafer backside interconnecting wire includes forming a mask layer on the back surface, the mask layer including at least an opening corresponding to the bonding pad, performing a first etching process from the back surface to remove the wafer unprotected by the mask layer to form a recess, removing the mask layer, and forming an interconnecting wire on the back surface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.