Guard ring structure and method for fabricating same
US7009228B1 · kind B1 · utility
22Cited by
9References
17Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 4, 2003 |
| Grant date | Mar 7, 2006 |
| Priority date | — |
| Expiry date | Mar 4, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/106
Abstract
A method for fabricating a guard ring structure for JFETs and MESFETs. Trenches are etched in a semiconductor substrate for fabrication of a gate structure for a JFET or MESFET. At time the gate trenches are etched, concentric guard ring trenches are also etched. The process used to fabricate the gate p-h junction or Schottky barrier at the bottom of the gate trenches is also used to fabricate the guard ring at bottom of the guard ring trenches. The separation between the guard ring trenches is 1.0 to 3.0 times greater than the separation between the gate trenches.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.