Semiconductor device having punch-through structure off-setting the edge of the gate electrodes
US7009255B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 23, 2003 |
| Grant date | Mar 7, 2006 |
| Priority date | — |
| Expiry date | May 23, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/018
Abstract
A semiconductor device and a method of manufacturing the same is disclosed. A trench is formed in an active region of a semiconductor substrate. A doped layer is formed on the inner walls of the trench. The trench is filled up with a first semiconductor layer. A gate insulating layer is formed on the first semiconductor layer and the substrate. Two gate electrodes are formed on the gate insulating layer such that the trench is located in between two gate electrodes. First and second impurity regions are formed in the substrate on both sides of each of the gate electrodes. Since the doped layer is locally formed in the trench area, the source and drain regions are completely separated from the heavily doped layer to weaken the electric field of PN junction, thereby improving refresh and preventing punchthrough between the source and drain.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.