Field-effect transistor

US7009263B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Gerhard Enders · Glen Allen, US
• Bjoern Fischer · Munich, DE
• Helmut Schneider · Hersbruck, DE
• Peter Voigt · Hallbergmoos, DE

Key dates

• Filing date: Apr 23, 2004
• Grant date: Mar 7, 2006
• Expiry date: Aug 6, 2024

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/235

Abstract

A field-effect transistor includes a semiconductor substrate, a source region formed in the semiconductor substrate, a drain region formed in the semiconductor substrate, a channel region formed in the semiconductor substrate, wherein the source region is connected to a source terminal electrode and the drain region is connected to a drain terminal electrode, wherein the channel region comprises a first narrow width channel region and a second narrow width channel region connected in parallel regarding the source terminal electrode and the drain terminal electrode, and wherein the first narrow width channel region and/or the second narrow width channel region comprise lateral edges narrowing the width of the narrow width channel region is such a way that a channel formation in the narrow width channel region is influenced by a mutually influencing effect of the lateral edges, and a gate electrode arranged above the first and second narrow width channel regions.