Method of manufacturing semiconductor device
US7015107B2 · kind B2 · utility
5Cited by
7References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 16, 2002 |
| Grant date | Mar 21, 2006 |
| Priority date | — |
| Expiry date | Sep 8, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/259
Abstract
When a dummy sidewall and source and drain regions are once formed and then the dummy sidewall is removed to extend the source and drain regions, the removal of the dummy sidewall is performed after formation of a protective oxide film on a gate electrode and on the major surfaces of the source and drain regions. This efficiently prevents conventional surface roughness of the upper surface of the gate electrode and the impurity region due to the removal of the dummy sidewall.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.