Semiconductor integrated circuit having built-in PLL circuit
US7015735B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Dec 19, 2003 |
| Grant date | Mar 21, 2006 |
| Priority date | — |
| Expiry date | Mar 31, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/1075
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A semiconductor integrated circuit having a built-in PLL circuit which has two charge pump circuits for charging and discharging capacitive elements of a loop filter in response to signals generated by a phase comparator circuit. One of the two charge pump circuits has current sources which generate current values smaller than those generated by current sources of the other charge pump circuit. The loop filter has a first capacitive element connected to a charge/discharge node, and a second capacitive element connected to the charge/discharge node through a resistive element. The first capacitive element is charged and discharged by the one charge pump circuit, while the second capacitive element is charged and discharged by the other charge pump circuit. A charging current source of the one charge pump circuit operates simultaneously with a discharging current source of the other charge pump circuit, i.e., the charge pump circuits operate in opposite phase.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.