Semiconductor module including semiconductor memory device shiftable to test mode as well as semiconductor memory device used therein
US7017090B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 12, 2002 |
| Grant date | Mar 21, 2006 |
| Priority date | — |
| Expiry date | Aug 20, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/401
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor module includes a plurality of semiconductor memory devices, a registered buffer, a PLL circuit and a test mode entry circuit. The test mode entry circuit receives a signal MRS, a bank address signal and an address signal from the registered buffer, directly and externally receives a signal formed of a high voltage level higher than the voltage level in a normal operating range, generates a deactivating signal for deactivating the PLL circuit and a test mode shift signal formed of the high voltage level, applying the deactivating signal to the PLL circuit, and applying the test mode shift signal to the plurality of semiconductor memory devices. Consequently, the plurality of semiconductor memory devices included in the module can be shifted to the test mode in the modular state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.