Method to form local “silicon-on-nothing” or “silicon-on-insulator” wafers with tensile-strained silicon
US7018882B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 23, 2004 |
| Grant date | Mar 28, 2006 |
| Priority date | — |
| Expiry date | Mar 23, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
Abstract
A method of forming a substrate for use in IC device fabrication includes preparing a silicon substrate, including doping a bulk silicon (100) substrate with ions taken from the group of ions to form a doped substrate taken from the group of doped substrates consisting of n-type doped substrates and p-type doped substrates; forming a first relaxed SiGe layer on the silicon substrate; forming a first tensile-strained silicon cap on the first relaxed SiGe layer; forming a second relaxed SiGe layer on the first tensile-strained silicon cap; forming a second tensile-strained silicon cap on the second relaxed SiGe layer; and completing an IC device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.