Semiconductor processing apparatus comprising chamber partitioned into reaction and transfer sections
US7021881B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 23, 2004 |
| Grant date | Apr 4, 2006 |
| Priority date | — |
| Expiry date | Dec 23, 2024 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S414/139
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Semiconductor processing equipment that has increased efficiency, throughput, and stability, as well as reduced operating cost, footprint, and faceprint is provided. Other than during deposition, the atmosphere of both the reaction chamber and the transfer chamber are evacuated using the transfer chamber exhaust port, which is located below the surface of the semiconductor wafer. This configuration prevents particles generated during wafer transfer or during deposition from adhering to the surface of the semiconductor wafer. Additionally, by introducing a purge gas into the transfer chamber during deposition, and by using an insulation separating plate 34, the atmospheres of the transfer and reaction chambers can be effectively isolated from each other, thereby preventing deposition on the walls and components of the transfer chamber. Finally, the configuration described herein permits a wafer buffer mechanism to be used with the semiconductor processing equipment, thereby further increasing throughput and efficiency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.