Data speculation based on addressing patterns identifying dual-purpose register
US7024537B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 21, 2003 |
| Grant date | Apr 4, 2006 |
| Priority date | — |
| Expiry date | Sep 1, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3832
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system may include a memory file and an execution core. The memory file may include an entry configured to store an addressing pattern and a tag. If an addressing pattern of a memory operation matches the addressing pattern stored in the entry, the memory file may be configured to link a data value identified by the tag to a speculative result of the memory operation. The addressing pattern of the memory operation includes an identifier of a logical register, and the memory file may be configured to predict whether the logical register is being specified as a general purpose register or a stack frame pointer register in order to determine whether the addressing pattern of the memory operation matches the addressing pattern stored in the entry. The execution core may be configured to access the speculative result when executing another operation that is dependent on the memory operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.