Low-power indicator
US7024570B2 · kind B2 · utility
3Cited by
3References
35Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 18, 2002 |
| Grant date | Apr 4, 2006 |
| Priority date | — |
| Expiry date | Mar 17, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/3225
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A random access memory with a low power mode indicator. The random access memory includes a state machine for generating a power mode output signal. A power mode pin control circuit is connected to the state machine for receiving the power mode output signal. A power mode pin is connected to the power mode pin control circuit for providing an output indicative of the power mode output signal received from the state machine.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.