Individually biased transistor high frequency switch
US7030515B2 · kind B2 · utility
1Cited by
7References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 21, 2003 |
| Grant date | Apr 18, 2006 |
| Priority date | — |
| Expiry date | Jun 8, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01P1/15
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A single-pole multiple-throw RF switch includes first and second FET arrangements, each having a gate and a controlled current path (CCP). One end of the CCP of each FET is connected to a common port by way of an arrangement which blocks DC flow between the FETs, but allows RF flow. Bias is applied to the gates of the FETs to enable RF flow through the CCP of a selected one and not through the others. One version uses a single bias source and cross-coupled resistors, and another version uses plural bias sources switched to the various FETs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.