Method for setting a termination voltage and an input circuit
US7030645B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 23, 2004 |
| Grant date | Apr 18, 2006 |
| Priority date | — |
| Expiry date | Apr 30, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F1/575
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Input circuit and method for setting a termination voltage. One embodiment provides a method for setting a termination voltage of an input circuit of an integrated circuit, the input circuit having an input terminal for receiving a signal, the termination voltage being applied to the input terminal, the received signal being driven with respect to the termination voltage and being evaluated by a comparison with a reference potential, the termination voltage being generated and being set in accordance with a control signal, the control signal being generated in a manner dependent on a comparison of one or more signal levels of the received signal with an assessment potential, the termination voltage being set by means of the control signal in such a way that the reliability of the signal reception is maximized.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.