Flip chip interconnection structure
US7033859B2 · kind B2 · utility
46Cited by
30References
23Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | May 20, 2004 |
| Grant date | Apr 25, 2006 |
| Priority date | — |
| Expiry date | May 20, 2024 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T428/24917
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A flip chip interconnection structure is formed by mechanically interlocking joining surfaces of a first and second element. The first element, which may be a bump on an integrated circuit chip, includes a soft, deformable material with a low yield strength and high elongation to failure. The surface of the second element, which may for example be a substrate pad, is provided with asperities into which the first element deforms plastically under pressure to form the mechanical interlock.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.