Semiconductor device and method of manufacturing same
US7033868B2 · kind B2 · utility
11Cited by
1References
11Claims
0Family size
Assignee
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Key dates
| Filing date | Mar 25, 2004 |
| Grant date | Apr 25, 2006 |
| Priority date | — |
| Expiry date | Mar 25, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/791
Abstract
A high-speed, low-power-consumption semiconductor device has a thin-film Si layer with a source/drain formed therein. The thin-film Si layer is curved from a region directly below a gate electrode toward a region near the source/drain. The curved thin-film Si layer develops strains in a channel region disposed directly below the gate electrode sandwiched by the source/drain in the thin-film Si layer, for thereby increasing a carrier mobility. A cavity is defined below the curved thin-film Si layer for reducing a parasitic capacitance due to a pn junction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.