Method of making semiconductor devices
US7033899B2 · kind B2 · utility
1Cited by
2References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 22, 2004 |
| Grant date | Apr 25, 2006 |
| Priority date | — |
| Expiry date | Dec 22, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/31155
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating semiconductor device is provided. A high stress layer formed on, under or on both sides of the transistors of the semiconductor device is employed as a cap layer. A specific region is then defined through photo resistor mask, and the stress of the region is changed by ion implanting. Therefore, compressive stress and tensile stress occur on the high stress layer. According the disclosed method, the high stress layer may simultaneously improve the characteristics of the transistors formed on the same wafer. Further, the mobility of the carriers of the device is enhanced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.