Temperature optimization of a physical vapor deposition process to prevent extrusion into openings
US7033931B2 · kind B2 · utility
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3References
30Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 1, 2003 |
| Grant date | Apr 25, 2006 |
| Priority date | — |
| Expiry date | Aug 1, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76847
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A physical vapor deposition process for maintaining the wafer below a critical temperature. The rate at which material particles are sputtered from the target and thus deposited on the wafer is controllable in response to power supplied to the target. Maintaining a desired deposition rate maintains the wafer temperature below the critical temperature.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.