Methods and apparatus for improving fetching and dispatch of instructions in multithreaded processors
US7035997B1 · kind B1 · utility
36Cited by
47References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 14, 2000 |
| Grant date | Apr 25, 2006 |
| Priority date | — |
| Expiry date | Jul 29, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3851
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a multi-streaming processor, a system for fetching instructions from individual ones of multiple streams to an instruction pipeline is provided, comprising a fetch algorithm for selecting from which stream to fetch an instruction, and one or more predictors for forecasting whether a load instruction will hit or miss the cache or a branch will be taken. The prediction or predictions are used by the fetch algorithm in determining from which stream to fetch. In some cases probabilities are determined and also used in decisions, and predictors may be used at either or both of fetch and dispatch stages.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.