Manufacture of semiconductor device having STI and semiconductor device manufactured
US7037803B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 26, 2003 |
| Grant date | May 2, 2006 |
| Priority date | — |
| Expiry date | Nov 26, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device manufacture method has the steps of: (a) forming a polishing stopper layer over a semiconductor substrate; (b) etching the semiconductor substrate to form a trench; (c) forming a first liner insulating layer of silicon oxide over the surface of the trench; (d) forming a second liner insulating layer of silicon nitride over the first liner insulating layer, the second liner insulating layer having a thickness of at least 20 nm or at most 8 nm; (e1) depositing a third liner insulating layer of silicon oxide over the second liner insulating layer by plasma CVD at a first bias; and (e2) depositing an isolation layer of silicon oxide by plasma CVD at a second bias higher than the first bias, the isolation layer burying a recess defined by the third liner insulating layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.