Dissipation of a charge buildup on a wafer portion
US7038293B2 · kind B2 · utility
1Cited by
4References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 29, 2004 |
| Grant date | May 2, 2006 |
| Priority date | — |
| Expiry date | Mar 29, 2024 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB81C1/00579
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
An apparatus in one example comprises a wafer portion that comprises a conduction layer. Upon exposure of the conduction layer during a etch of the wafer portion, the conduction layer serves to dissipate a portion of a charge buildup on the wafer portion during an etch of the wafer portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.