Chip package structure with glass substrate
US7038309B2 · kind B2 · utility
22Cited by
0References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 15, 2003 |
| Grant date | May 2, 2006 |
| Priority date | — |
| Expiry date | Jan 20, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention provides a chip package structure, comprising: a glass substrate having a substrate surface; a circuit layer on the substrate surface, wherein the circuit layer comprises an interconnection structure; at least a die on the circuit layer, wherein the die is coupled to the interconnection structure; and a plurality of contacts on the circuit layer, wherein the contacts are coupled to the interconnection structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.