Method for testing a circuit unit to be tested and test apparatus
US7039838B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 26, 2002 |
| Grant date | May 2, 2006 |
| Priority date | — |
| Expiry date | Oct 18, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/34
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The invention provides a method for testing a circuit unit (101) to be tested, in which a test time is reduced, at least one word line (102a–102N) of the circuit unit (101) to be tested being activated by application of at least one test signal (103) to the word line (102a–102N), the at least one word line (102a–102N) being deactivated by removal of the test signal (103) from the word line (102a–102N), the word lines among all the word lines (102a–102N) which have not run through an activation-deactivation cycle being read out in order to determine an influence of the activation and deactivation, and the test result being output.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.