Enhanced substrate contact for a semiconductor device

US7041561B2 · kind B2 · utility

Assignee

• Agere Systems Inc. · US

Inventors

• Frank Baiocchi · Allentown, US
• Bailey Jones · Shillington, US
• Muhammed Ayman Shibib · Wyomissing, US
• Shuming Xu · Schnecksville, US

Key dates

• Filing date: Mar 31, 2004
• Grant date: May 9, 2006
• Expiry date: Mar 31, 2024

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/254

Abstract

A technique for forming a semiconductor structure in a semiconductor wafer includes the steps of forming an epitaxial layer on a least a portion of a semiconductor substrate of a first conductivity type and forming at least one trench in an upper surface of the semiconductor wafer and partially into the epitaxial layer. The method further includes the step of forming at least one diffusion region between a bottom wall of the trench and the substrate, the diffusion region providing an electrical path between the bottom wall of the trench and the substrate. One or more sidewalls of the trench are doped with a first impurity of a known concentration level so as to form an electrical path between an upper surface of the epitaxial layer and the at least one diffusion region. The trench is then filled with a filler material.