Key stream cipher device
US7043017B2 · kind B2 · utility
9Cited by
9References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 13, 2001 |
| Grant date | May 9, 2006 |
| Priority date | — |
| Expiry date | Feb 4, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L9/065
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A symmetric key stream processor 60 that encrypts and decrypts text in accordance with the RC4 algorithm has a main processing block 62 and a host interface 64. The main processing block 62 includes an Sbox memory 78 implemented with a synchronous dual-port RAM and an encryption logic block 80 with a finite state machine. The dual port memory architecture is used for efficiency during permutation and message processing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.