Method and apparatus for simulation processor
US7043596B2 · kind B2 · utility
4Cited by
13References
63Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 29, 2002 |
| Grant date | May 9, 2006 |
| Priority date | — |
| Expiry date | Jun 25, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/101
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for computation is provided. A main cluster crossbar is connected to a plurality of statically scheduled routing processors. A first sub-cluster crossbar is associated with a first one of the plurality of statically scheduled routing processors where the first sub-cluster crossbar is connected to a first plurality of execution processors. A second sub-cluster crossbar is associated with a second one of the plurality of statically scheduled routing processors where the second sub-cluster crossbar is connected to a second plurality of execution processors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.