Dynamic memory supporting simultaneous refresh and data-access transactions
US7043599B1 · kind B1 · utility
203Cited by
5References
95Claims
0Family size
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Key dates
| Filing date | Oct 9, 2002 |
| Grant date | May 9, 2006 |
| Priority date | — |
| Expiry date | Oct 9, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/40603
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Described are dynamic memory systems that perform overlapping refresh and data-access (read or write) transactions that minimize the impact of the refresh transaction on memory performance. The memory systems support independent and simultaneous activate and precharge operations directed to different banks. Two sets of address registers enable the system to simultaneously specify different banks for refresh and data-access transactions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.